1. Technical Field
The present invention relates generally to methods for producing Group III nitride crystal, and more specifically to methods for producing Group III nitride crystal having a major surface with a plane orientation other than {0001}.
2. Description of the Related Art
Group III nitride crystals suitably used in light emitting devices, electronic devices, and semiconductor sensors are generally produced by crystal growth on a major surface of a sapphire substrate having a (0001) major surface or a GaAs substrate having a (111) A major surface by a vapor-phase growth method, such as a hydride vapor phase epitaxy (HVPE) method or a metalorganic chemical vapor deposition (MOCVD) method, or a liquid-phase growth method, such as a flux method. Thus, Group III nitride crystals generally produced have a major surface with a {0001} plane orientation.
A light emitting device in which a light-emitting layer having a multi-quantum well (MQW) structure is formed on a major surface of a Group III nitride crystal substrate having the major surface with a {0001} plane orientation generates spontaneous polarization in the light-emitting layer because of the polarity of the Group III nitride crystal in a <0001> direction. The spontaneous polarization reduces luminous efficiency. Thus, there is a demand for the production of a Group III nitride crystal having a major surface with a plane orientation other than {0001}.
The following methods have been proposed as a method for producing a Group III nitride crystal having a major surface with a plane orientation other than {0001}. For example, Japanese Unexamined Patent Application Publication No. 2005-162526 (Patent Literature 1) discloses the following method for producing a GaN crystal having a surface with any plane orientation independent of the substrate plane orientation. A plurality of rectangular parallelepiped crystalline masses are cut from a GaN crystal grown by a vapor-phase growth method. After a silicon oxide film is formed on the surface of a sapphire substrate prepared separately, a plurality of depressions reaching the substrate are formed. The plurality of crystalline masses are embedded in the depressions such that the top surfaces of the crystalline masses are unidirectionally oriented. Gallium nitride crystals having a surface with a certain plane orientation are then grown by a vapor-phase growth method using the crystalline masses as seeds.
Japanese Unexamined Patent Application Publication No. 2006-315947 (Patent Literature 2) discloses the following method for producing a nitride semiconductor wafer that can achieve both a low dislocation density and a large area. A primary wafer formed of a hexagonal nitride semiconductor and having two facing main c-planes is prepared. The primary wafer is then cut along an m-plane to produce a plurality of nitride semiconductor bars. The plurality of nitride semiconductor bars are then arranged such that the c-planes of adjacent nitride semiconductor bars face each other and the m-plane of each of the nitride semiconductor bars becomes the top surface. A nitride semiconductor is then regrown on the top surfaces of the arranged nitride semiconductor bars to form a nitride semiconductor layer having a continuous m-plane as the major surface.
Japanese Unexamined Patent Application Publication No. 2008-143772 (Patent Literature 3) discloses the following method for producing a high-crystallinity Group III nitride crystal that has a major surface other than {0001}. A plurality of Group III nitride crystal substrates having a major surface with a certain plane orientation are cut from a Group III nitride bulk crystal. The substrates are then transversely arranged adjacent to each other such that the major surfaces of the substrates are parallel to each other and the substrates have the same [0001] direction. A Group III nitride crystal is then grown on the major surfaces of the substrates.
However, in the method according to Japanese Unexamined Patent Application Publication No. 2005-162526 (Patent Literature 1), in which GaN crystals are grown using crystalline masses of GaN crystals embedded in the sapphire substrate as seeds, a difference in thermal expansion coefficient between sapphire and GaN results in the generation of cracks or strain in the GaN crystals during cooling after crystal growth. Thus, this method could not produce high-crystallinity GaN crystals.
The method according to Japanese Unexamined Patent Application Publication No. 2006-315947 (Patent Literature 2) only produces a nitride semiconductor wafer having an m-plane as a major surface. Furthermore, when a nitride semiconductor layer is grown using the m-plane as a major surface at a high growth rate, polycrystals are deposited on the major surface. It is therefore difficult to produce a thick nitride semiconductor layer having high crystallinity.
In the method according to Japanese Unexamined Patent Application Publication No. 2008-143772 (Patent Literature 3), a Group III nitride crystal is grown on a major surface with a certain plane orientation. Thus, the certain plane orientation includes a plane orientation in which a crystal is stably grown and a plane orientation in which a crystal is unstably grown. In the plane orientation in which a crystal is stably grown, it is difficult to produce a thick Group III nitride crystal because of a low growth rate of the Group III nitride crystal. In the plane orientation in which a crystal is unstably grown, it is difficult to perform stable epitaxial growth of a Group III nitride crystal, and the Group III nitride crystal thus grown tends to have cracks.